The Diligence Stack - By Creative Strategies

The Diligence Stack - By Creative Strategies

Chip Equipment Just Beat Our Bull Case, and the Cycle Is Getting Longer

We now see 2026 wafer fab equipment at $153 billion and $278 billion by 2030, and this week’s results from ASML, Applied and TSMC point toward our High case.

Ben Bajarin's avatar
Ben Bajarin
Oct 15, 2026
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More from Atlas this week.
This report builds on our event and earnings coverage from the past few days:

  • TSMC Q3 2026: The Foundry Checked the Power Before It Poured the Concrete

  • ASML Q3 2026: Pricing Power Arrives and the Order Book Reaches 2030

  • Applied Materials Investor Breakfast: Yield Becomes Capacity

  • Silicon to Systems: Every Fix Moves the Bottleneck, from Applied’s EPIC Center panel

  • NVIDIA’s 800 VDC Wall: GaN Gets the Attention, SiC Gets the Dollars


In January we argued that this equipment cycle would run longer and higher than the industry’s history suggests. Demand for tools had decoupled from wafer volume, for three reasons. Gate-all-around transistors and backside power were cutting tool reuse at 2nm. HBM was consuming three to four times the wafer capacity of standard DRAM for the same bits. And advanced packaging had become a second bottleneck next to lithography. On that basis we put 2026 wafer fab equipment at $125 to $129 billion in our base case, with upside to $145 billion.

We were too cautious in our approach but between earnings from ASML and TSMC as well as many of our conversations with the semicap ecosystem at Semicon West this week we are now leaning to our more bull case as the base case. Our WFE Core model now has 2026 at about $153 billion in the Base case, up roughly 28% from 2025, and at about $157 billion in our High case. Both numbers sit above the bull case we published nine months ago. The direction of the January call held, but we underestimated how quickly memory makers and leading-edge foundries would commit capital once AI demand proved it would last, and how much more equipment each new wafer would need.

Three events this week gave us a clear read on where the cycle stands. At its investor breakfast, Applied Materials described yield as the largest change its CEO has seen this year. Leading-edge logic and DRAM fabs are running at roughly full utilization, and cleanroom space is setting the pace of tool installs. ASML reported a record quarter and raised its 2026 outlook to roughly €44.5 billion. It also told investors it had negotiated price increases on its most critical tools for the first time in its history. A day later TSMC raised its 2026 growth outlook to about 44%, said AI demand is still far above what it can supply, and told investors its capital spending from 2026 through 2028 will be significantly higher than in the prior three years.

The common thread is a change we have been tracking all year: the hardest problems in AI hardware have moved from the transistor to the system. We think this, and its implications for chip vendors, is being entirely misunderstood by the market. Accelerators already sit at the reticle limit, packages are approaching the largest size anyone can build and cool, and the remaining gains come from moving each bit a shorter distance at lower energy and from getting heat out of the chip. Each of those fixes becomes a new process step, a new material or a new tool, and each one opens a new kind of chip design that needs still more steps. We described the engineering side of this in our note from the EPIC Center panel, where engineers from NVIDIA, Qualcomm and Broadcom walked through the constraints they face. This report puts numbers on what those constraints mean for equipment spending in what we believe is a structural growth cycle in WFE that will materially change the future shape of the semiconductor industry.

In the full report:

  • Why we keep our Base case as the anchor while the evidence leans toward High, and the three signals that would move our 2030 anchor from about $278 billion to about $308 billion

  • How this week’s numbers from ASML, Applied Materials and TSMC line up against our Base and High cases

  • Memory’s rise to more than half of device WFE, and the DRAM tool spending path behind it

  • The Angstrom-era transitions, from gate-all-around and backside power to 4F² and 3D DRAM, and what each adds to tool spending per wafer

  • The silicon-to-systems constraints (DRAM on logic, system-on-wafer and co-packaged optics) and the tool categories they land in

  • Where the dollars land by tool category, region and vendor, with 2030 revenue paths for ASML, Applied Materials, Lam Research, KLA and ASM International

  • Five exhibits and the six signals we are tracking over the next two quarters

Companies covered in this report: ASML (ASML), Applied Materials (AMAT), Lam Research (LRCX), KLA (KLAC), Tokyo Electron (8035.T), ASM International (ASM.AS), TSMC (TSM), Samsung Electronics (005930.KS), SK Hynix (000660.KS), Micron (MU), Intel (INTC), NVIDIA (NVDA), Broadcom (AVGO), Qualcomm (QCOM)

Subscribe to read the full analysis, including our scenario forecasts through 2030 and the segment, tool and vendor detail. All reports and data are powered by the CS Forecast Stack.

Go deeper in Atlas. Atlas subscribers can query the forecast tables and evidence behind this report, across all four scenarios, and subscribers with model access can open the WFE Core Model V2.3 directly. Ask the Atlas Agent to break down any case by segment, tool category, region or vendor, or start from one of these prompts:

  • Compare Base and High in the WFE model

  • Check the three signals that would move our anchor

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